PIC APRS Beacon - Revision history

Elijah at 19:11, 4 January 2014

2014-01-04T19:11:04Z

← Older revision		Revision as of 19:11, 4 January 2014
Line 1:		Line 1:
	This project was started as a fun experiment to see if an AFSK signal could be generated using only an 8 bit PIC and a resistor ladder network. Once that was working, I laid out a board for it and added the additional software logic to get what you see here.		[[File:PicAprs1.jpg\|thumb\|Packaged beacon]]This project was started as a fun experiment to see if an AFSK signal could be generated using only an 8 bit PIC and a resistor ladder network. Once that was working, I laid out a board for it and added the additional software logic to get what you see here.

	== Overview ==		== Overview ==

	[[File:Layout.png\|thumb\|~~PICTrack board~~ layout]]		[[File:Layout.png\|thumb\|PCB layout]]
	[[File:Schematic.png\|thumb\|~~PICTrack board layout~~]]		[[File:Schematic.png\|thumb\|Schematic]]
			[[File:IMAG1262.jpg\|thumb\|PCB closeup]]
	* Simple and inexpensive APRS beacon		* Simple and inexpensive APRS beacon
	* AFSK is generated using a resistor network so no modem chip is needed		* AFSK is generated using a resistor network so no modem chip is needed

Elijah at 03:24, 4 January 2014

2014-01-04T03:24:16Z

← Older revision		Revision as of 03:24, 4 January 2014
Line 17:		Line 17:

	For communication it's currently using a VHF [[Maxon Radio]]. These can be tuned from 144 to 178 MHz and are very durable - the downside is their weight (about 9oz).		For communication it's currently using a VHF [[Maxon Radio]]. These can be tuned from 144 to 178 MHz and are very durable - the downside is their weight (about 9oz).

			An onboard Trimble Copernicus provides GPS data. I wanted to try a helical GPS antenna instead of the patch antennas we've used in the past since those tend to lose lock if the payload somehow gets flipped over. This antenna is soldered directly onto the board so there are no cables to break.

	== Software ==		== Software ==
Line 26:		Line 28:
	AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.		AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.

			NMEA data from the GPS is placed in a FIFO by the interrupt handler and then removed from the FIFO and parsed by the background task. At the same time, the strings are written to the filesystem on the SD card. The CHaN FAT filesystem implementation is used because it's lightweight and designed to fit in the limited space of a micro controller. The SD card itself interfaces with the PIC via the SPI interface.

			The packets themselves use the MIC-E compressed format which has the advantage of being transmitted quickly and contains all the necessary info in a single packet.

	Currently the remaining capabilities still need to be implemented:		Currently the remaining capabilities still need to be implemented:
			# Configurable callsign and digi paths
	# ~~Flash memory interface (in progress, partially complete)~~
	~~# GPS NMEA interface~~
	~~# RS232 Console interface~~

Elijah at 02:43, 4 January 2014

2014-01-04T02:43:18Z

← Older revision		Revision as of 02:43, 4 January 2014
Line 1:		Line 1:
	This project was started as a fun experiment to see if an AFSK signal could be generated using only an 8 bit PIC and a resistor ladder network. ~~Since this is now realized~~, the additional ~~features~~ to ~~make it a fully capable beacon will (hopefully:) be implemented~~.		This project was started as a fun experiment to see if an AFSK signal could be generated using only an 8 bit PIC and a resistor ladder network. Once that was working, I laid out a board for it and added the additional software logic to get what you see here.

	== ~~High Level System Requirements~~ ==		== Overview ==

	[[File:Layout.png\|thumb\|PICTrack board layout]]		[[File:Layout.png\|thumb\|PICTrack board layout]]
	[[File:Schematic.png\|thumb\|PICTrack board layout]]		[[File:Schematic.png\|thumb\|PICTrack board layout]]
	* ~~Implementation should be simple~~ and inexpensive		* Simple and inexpensive APRS beacon
	* ~~AX.25 packet capability for data transmission~~		* AFSK is generated using a resistor network so no modem chip is needed
	* ~~Interface~~ with a ~~GPS using either ASCII NMEA or a binary protocol~~		* Adjustable audio output allows interfacing with a variety of radios
	* On-~~board landing prediction based on wind data gathered during ascent~~		* Integrated GPS with helical antenna - no cables to break and works in any orientation
	* ~~Logging~~		* NMEA strings are stored on a FAT32 formatted micro SD card
	** Data to be stored on ~~on-board flash memory.~~		* Software is modular and easy to understand
	** Board temperature
	** Battery voltage
	* Ability to ~~configure volatile parameters via RS232 console~~
	** Call Sign & SSID
	** Status string

	== Hardware ==		== Hardware ==

	The hardware started out based around a PIC18F14K22 ~~(?)~~ which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only ~~has~~ 512 bytes of RAM which ~~may get a little thin~~ handling NMEA strings. ~~The~~ PIC18F2525 ~~would~~ be ~~a second choice if more RAM is~~ necessary.		The hardware started out based around a PIC18F14K22 which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only had 512 bytes of RAM which wasn't enough for handling NMEA strings and a full FAT filesystem. I switched to the PIC18F2525 since it has plenty of both codespace and RAM. It's running at 32 MHz clocked off the internal oscillator, although the current board layout has provision for an external crystal should that prove to be necessary for temperature stability.

	~~Currently~~ it is using a VHF [[Maxon Radio]] ~~for communication~~. These can be tuned from 144 to 178 MHz.		For communication it's currently using a VHF [[Maxon Radio]]. These can be tuned from 144 to 178 MHz and are very durable - the downside is their weight (about 9oz).

	== Software ==		== Software ==
Line 27:		Line 22:
	The source code is hosted at github here https://github.com/AD7ZJ/PICAprs		The source code is hosted at github here https://github.com/AD7ZJ/PICAprs

	The software is written in C and built ~~with~~ the ~~Hitec C~~ compiler. The AFSK modulator ~~works using~~ a 32 entry lookup table, which ~~produces~~ a ~~single cycle~~ of a sin wave. AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.		The software is written in C and built using MPLab X and the XC8 compiler. The AFSK modulator uses a resistor network and a 16 entry lookup table to produce a sin wave. There's a 1k resistor, 2k, 4k, 8k (or as close as standard values allow) which let 4 digital outputs work as a primitive sort of DAC (think powers of 2). The lookup table is designed to approximate a sin wave using the 16 possible outputs of this DAC. The sin wave's frequency can be adjusted by how quickly we step through the table. This timing is set by one of the PIC's internal timer modules, Timer2. I initially tried to use this on an interrupt routine, but it turned out the context switch time to service each interrupt was taking too long. So while a packet is being sent, nothing else is happening.

			AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.

Elijah at 05:53, 27 October 2013

2013-10-27T05:53:12Z

← Older revision		Revision as of 05:53, 27 October 2013
Line 20:		Line 20:

	The hardware started out based around a PIC18F14K22 (?) which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only has 512 bytes of RAM which may get a little thin handling NMEA strings. The PIC18F2525 would be a second choice if more RAM is necessary.		The hardware started out based around a PIC18F14K22 (?) which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only has 512 bytes of RAM which may get a little thin handling NMEA strings. The PIC18F2525 would be a second choice if more RAM is necessary.

			Currently it is using a VHF [[Maxon Radio]] for communication. These can be tuned from 144 to 178 MHz.

	== Software ==		== Software ==

Elijah at 21:56, 1 May 2013

2013-05-01T21:56:24Z

← Older revision		Revision as of 21:56, 1 May 2013
Line 3:		Line 3:
	== High Level System Requirements ==		== High Level System Requirements ==

			[[File:Layout.png\|thumb\|PICTrack board layout]]
			[[File:Schematic.png\|thumb\|PICTrack board layout]]
	* Implementation should be simple and inexpensive		* Implementation should be simple and inexpensive
	* AX.25 packet capability for data transmission		* AX.25 packet capability for data transmission
Line 17:		Line 19:
	== Hardware ==		== Hardware ==

	~~[[File:Layout.png\|thumb\|PICTrack board layout]]~~
	The hardware started out based around a PIC18F14K22 (?) which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only has 512 bytes of RAM which may get a little thin handling NMEA strings. The PIC18F2525 would be a second choice if more RAM is necessary.		The hardware started out based around a PIC18F14K22 (?) which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only has 512 bytes of RAM which may get a little thin handling NMEA strings. The PIC18F2525 would be a second choice if more RAM is necessary.

Elijah at 21:55, 1 May 2013

2013-05-01T21:55:46Z

← Older revision		Revision as of 21:55, 1 May 2013
Line 17:		Line 17:
	== Hardware ==		== Hardware ==

			[[File:Layout.png\|thumb\|PICTrack board layout]]
	The hardware started out based around a PIC18F14K22 (?) which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only has 512 bytes of RAM which may get a little thin handling NMEA strings. The PIC18F2525 would be a second choice if more RAM is necessary.		The hardware started out based around a PIC18F14K22 (?) which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only has 512 bytes of RAM which may get a little thin handling NMEA strings. The PIC18F2525 would be a second choice if more RAM is necessary.
	~~[[File:Layout.png\|thumb\|PICTrack board layout]]~~

	== Software ==		== Software ==

Elijah: /* Hardware */

2013-05-01T21:53:28Z

Hardware

← Older revision		Revision as of 21:53, 1 May 2013
Line 17:		Line 17:
	== Hardware ==		== Hardware ==

	The hardware started out based around a PIC18F14K22 (?) which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only has 512 bytes of RAM which may get a little thin handling NMEA strings. The PIC18F2525 would be a second choice if more RAM is necessary.		The hardware started out based around a PIC18F14K22 (?) which is one of the higher end 8 bit PICs. It's capable of running at up to 64 MHz, or 16 MIPs since each instruction takes 4 clock cycles to execute. This worked well, but only has 512 bytes of RAM which may get a little thin handling NMEA strings. The PIC18F2525 would be a second choice if more RAM is necessary.
			[[File:Layout.png\|thumb\|PICTrack board layout]]

	== Software ==		== Software ==

Elijah at 16:47, 21 February 2013

2013-02-21T16:47:11Z

← Older revision		Revision as of 16:47, 21 February 2013
Line 20:		Line 20:

	== Software ==		== Software ==

			The source code is hosted at github here https://github.com/AD7ZJ/PICAprs

	The software is written in C and built with the Hitec C compiler. The AFSK modulator works using a 32 entry lookup table, which produces a single cycle of a sin wave. AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.		The software is written in C and built with the Hitec C compiler. The AFSK modulator works using a 32 entry lookup table, which produces a single cycle of a sin wave. AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.

Elijah at 23:52, 1 May 2012

2012-05-01T23:52:18Z

← Older revision		Revision as of 23:52, 1 May 2012
Line 23:		Line 23:
	The software is written in C and built with the Hitec C compiler. The AFSK modulator works using a 32 entry lookup table, which produces a single cycle of a sin wave. AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.		The software is written in C and built with the Hitec C compiler. The AFSK modulator works using a 32 entry lookup table, which produces a single cycle of a sin wave. AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.

	~~<code lang='c'>~~

	~~void main() {~~
	~~for(int i = 0; i < 20; i++)~~
	~~printf("This is a test");~~
	}

	~~</code>~~

	Currently the remaining capabilities still need to be implemented:		Currently the remaining capabilities still need to be implemented:

Elijah at 23:44, 1 May 2012

2012-05-01T23:44:59Z

← Older revision		Revision as of 23:44, 1 May 2012
Line 22:		Line 22:

	The software is written in C and built with the Hitec C compiler. The AFSK modulator works using a 32 entry lookup table, which produces a single cycle of a sin wave. AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.		The software is written in C and built with the Hitec C compiler. The AFSK modulator works using a 32 entry lookup table, which produces a single cycle of a sin wave. AFSK switches between 1200 Hz and 2200 Hz to represent mark and space, with a baud rate of 1200 bps. The data itself is encoded using NRZI (non-return to zero inverted), meaning zeros cause a state (as in, mark or space) change while 1's cause the state to remain the same. Bitstuffing is performed to keep 5 or more 1's from ever being sent in a row - this helps keep the receiver's clock synced up.

			<code lang='c'>

			void main() {
			for(int i = 0; i < 20; i++)
			printf("This is a test");
			}

			</code>

	Currently the remaining capabilities still need to be implemented:		Currently the remaining capabilities still need to be implemented: