Block Diagram

Shown below is a block diagram of the components that make up the HF-APRS system. The system is controlled with an ARM7 processor. The ARM7 is the most popular 32-bit embedded controller and is used in a wide range of consumer devices such as cell phones and PDAs. The HF-APRS system utilizes an NXP (formerly Philips Semiconductor) LPC2148. The LPC2148 is a system on a chip with 512K of flash memory, 48K of SRAM, and a set of peripherals. The peripherals include multiple I2C, SPI, and UART ports as well as a USB bus, discrete I/O pins, and analog input and output channels.

The RF is generated with an Analog Devices AD9954 DDS. The DDS allows software control of the frequency and modulation for a wide variety of waveforms. The HF-APRS generates a PSK-31 and an FM 1200-buad A-FSK waveform. The output of the DDS is fed through a low pass filter to eliminate out of band images. A diplexer splits the signal into a <70MHz HF signal and a > 70MHz VHF signal. The VHF signal is amplified with a driver stage and a PA that generates a +27dBm (½ watt) signal. The HF signal is amplified with a low level amplifier, driver, and PA to generate a +33dBm (2 watt) signal. The HF chain is linear to allow the generation of the PSK-31 waveform. Given the relatively low output power, a lower efficiency of the linear chain doesn't adversely effect battery life for this application.

A 1MB flash chip provides memory for a flight data recorder. Science data is recorded with a temperature/humidity sensor. A variety of switching and linear regulators provide voltages for the RF chain, TCXO, processor, GPS, and DDS.





HF-APRS Block Diagram.